FPGA Verification Engineer - UVM
Nesco Resource ·nescoresource.com
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Description:
The selected candidate will be responsible for ASIC & FPGA development on R&D program. This engineer with have experience in developing, testing, and integrating digital signal processing (DSP), high speed digital design, high speed communication and system-on-chip (SOC) implemented on FPGA platforms. Experience with COTS based control platforms and embedded processors on FPGA platforms. This person will help develop more affordable ways to automate and develop scripts to improve FPGA development efforts. Cross discipline collaboration with Systems Architects, RF/Analog & Digital Circuit designers and ASIC/FPGA engineers to create leading edge products for future business growth, contributing to complex systems employing high speed networking concepts. The selected candidate will also provide support and technical direction to junior engineers. Overall contribution to design, simulation, verification, integration & test of complex, high speed products.
Custom Fields:
Name: Work Schedule
Value: 5/40-1st Shift
Name: Security Clearance Comments
Value: None
Name: Allow Expenses
Value: No
Name: Does this role require access to ECI information
Value: Yes
Name: Worksite Classification
Value: Worker will Telework > = 50%
Name: Opportunity for FTE Hire
Value: No
Name: Security Clearance
Value: None
Name: OT Status
Value: Exempt
Nesco Resource offers a comprehensive benefits package for our associates, which includes a MEC (Minimum Essential Coverage) plan that encompasses Medical, Vision, Dental, 401K, and EAP (Employee Assistance Program) services.
Nesco Resource provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws.
The selected candidate will be responsible for ASIC & FPGA development on R&D program. This engineer with have experience in developing, testing, and integrating digital signal processing (DSP), high speed digital design, high speed communication and system-on-chip (SOC) implemented on FPGA platforms. Experience with COTS based control platforms and embedded processors on FPGA platforms. This person will help develop more affordable ways to automate and develop scripts to improve FPGA development efforts. Cross discipline collaboration with Systems Architects, RF/Analog & Digital Circuit designers and ASIC/FPGA engineers to create leading edge products for future business growth, contributing to complex systems employing high speed networking concepts. The selected candidate will also provide support and technical direction to junior engineers. Overall contribution to design, simulation, verification, integration & test of complex, high speed products.
Custom Fields:
Name: Work Schedule
Value: 5/40-1st Shift
Name: Security Clearance Comments
Value: None
Name: Allow Expenses
Value: No
Name: Does this role require access to ECI information
Value: Yes
Name: Worksite Classification
Value: Worker will Telework > = 50%
Name: Opportunity for FTE Hire
Value: No
Name: Security Clearance
Value: None
Name: OT Status
Value: Exempt
Nesco Resource offers a comprehensive benefits package for our associates, which includes a MEC (Minimum Essential Coverage) plan that encompasses Medical, Vision, Dental, 401K, and EAP (Employee Assistance Program) services.
Nesco Resource provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws.
Frequently asked questions
Who is hiring for the FPGA Verification Engineer - UVM role?
Nesco Resource is hiring for the FPGA Verification Engineer - UVM position, a Shazamme client. Apply directly on the employer's career site.
Where is the FPGA Verification Engineer - UVM job located?
The FPGA Verification Engineer - UVM role with Nesco Resource is based in Sunnyvale, CA, US.
What does the FPGA Verification Engineer - UVM role pay?
Nesco Resource lists the FPGA Verification Engineer - UVM role at USD 100–125 per hour.
Is the FPGA Verification Engineer - UVM role full-time or contract?
This is a full time position at Nesco Resource.
What experience level is the FPGA Verification Engineer - UVM role?
The FPGA Verification Engineer - UVM position is aimed at mid-level candidates.
How do I apply for the FPGA Verification Engineer - UVM role at Nesco Resource?
Apply directly on Nesco Resource's career page via the Apply button on this listing. ZammeJobs links straight through to the employer's ATS — no third-party form, no resume database.